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Persistency semantics of the Intel-x86 architecture

Published:20 December 2019Publication History
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Abstract

Emerging non-volatile memory (NVM) technologies promise the durability of disks with the performance of RAM. To describe the persistency guarantees of NVM, several memory persistency models have been proposed in the literature. However, the persistency semantics of the ubiquitous x86 architecture remains unexplored to date. To close this gap, we develop the Px86 (‘persistent x86’) model, formalising the persistency semantics of Intel-x86 for the first time. We formulate Px86 both operationally and declaratively, and prove that the two characterisations are equivalent. To demonstrate the application of Px86, we develop two persistent libraries over Px86: a persistent transactional library, and a persistent variant of the Michael–Scott queue. Finally, we encode our declarative Px86 model in Alloy and use it to generate persistency litmus tests automatically.

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      • Published in

        cover image Proceedings of the ACM on Programming Languages
        Proceedings of the ACM on Programming Languages  Volume 4, Issue POPL
        January 2020
        1984 pages
        EISSN:2475-1421
        DOI:10.1145/3377388
        Issue’s Table of Contents

        Copyright © 2019 Owner/Author

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 20 December 2019
        Published in pacmpl Volume 4, Issue POPL

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