Abstract
No paper or presentation is available, but information on the "inherently secure processor" developed by Draper Laboratory can be found here: https://www.draper.com/explore-solutions/inherently-secure-processor
Recommendations
Reconfigurable Processing With Field Programmable Gate Arrays
ASAP '96: Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and ProcessorsIn-system-programmable, SRAM-based Field Programmable Gate Arrays (FPGAs) can be used to create processors and coprocessors whose internal architecture as well as interconnections can be reconfigured to match the needs of a given application. Exploiting ...
Video-rate stereo depth measurement on programmable hardware
CVPR'03: Proceedings of the 2003 IEEE computer society conference on Computer vision and pattern recognitionThis paper describes the implementation of a stereo depth measurement algorithm in hardware on Field-Programmable Gate Arrays (FPGAs). This system generates 8-bit sub-pixel disparities on 256 by 360 pixel images at video rate (30 frames/sec). The ...






Comments