Analog Circuit Implementation of LIF and STDP Models for Spiking Neural Networks

ABSTRACT

Spiking Neural Networks (SNN) is one special implementation of Artificial Neural Networks (ANN), where the input signals are encoded in the temporal relationship between consecutive spikes (spike trains) instead of real-numbered values. Nevertheless, SNN is believed to be a closer representation of the biological neural system, because it imitates the current spikes that are transmitted between neurons in real biological systems. Practical and simplified SNN models include the Leaky Integrate-and-Fire (LIF) function of the neurons and the Spiking Timing Dependent Plasticity (STDP) function of the synapses. While most ANN architectures can be implemented with digital logic gates, SNN is more suitable to be implemented in analog circuits. In this paper, we propose revised analog circuit implementations of SNN neurons with LIF and STDP functions. Compared with previous works by other researchers, our proposed analog designs use fewer components and can be cascaded to form a complete neural system. The circuits are designed and simulated with SMIC 55nm CMOS LP process. The simulated results demonstrate that the analog neural system can work under a very small current (less than 10 µA) and voltage supply (1.0 Volts), and consumes less power consumption than digital implementations.

References

1. Amirhossein Tavanaei, Masoud Ghodrati, Saeed Reza Kheradpisheh, Timothée Masquelier, and Anthony Maida. Deep learning in spiking neural networks.Neural Networks, 2018.
2. Daniel J Saunders, Hava T Siegelmann, Robert Kozma, et al. STDP Learning of Image Patches with Convolutional Spiking Neural Networks. In 2018 International Joint Conference on Neural Networks (IJCNN), pages 1--7. IEEE, 2018.
3. Stéphane Loiselle, Jean Rouat, Daniel Pressnitzer, and Simon Thorpe. Exploration of Rank Order Coding with Spiking Neural Networks for Speech Recognition. In Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005., volume 4, pages 2076--2080. IEEE, 2005.
4. Giacomo Indiveri. A Low-power Adaptive Integrate-and-Fire Neuron Circuit. In Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS'03., volume 4, pages IV--IV. IEEE, 2003.
5. Jose M Cruz-Albrecht, Michael W Yung, and Narayan Srinivasa. Energy-efficient Neuron, Synapse and STDP Integrated Circuits.IEEE transactions on biomedical circuits and systems, 6(3):246--256, 2012.
6. Adria Bofilli Petit and Alan F Murray. Synchrony Detection and Amplification by Silicon Neurons With STDP Synapses. IEEE Transactions on Neural Networks,15(5): 1296--1304, 2004.
7. Filip Ponulak and Andrzej Kasinski. Introduction to Spiking Neural Networks:Information Processing, Learning and Applications. Acta neurobiologiae experimentalis, 71(4):409--433, 2011.
8. Ying-Hui Liu and Xiao-Jing Wang. Spike-frequency Adaptation of a Generalized Leaky Integrate-and-Fire Model Neuron. Journal of computational neuroscience,10(1):25--45, 2001.
9. Donald Olding Hebb.The organization of behavior: A neuropsychological theory. Psychology Press, 2005.
10. Hideki Tanaka, Takashi Morie, and Kazuyuki Aihara. A CMOS Spiking Neural Network Circuit with Symmetric/Asymmetric STDP Function. IEICE transactions on fundamentals of electronics, communications and computer sciences, 92(7):1690--1698, 2009.
11. Mostafa Rahimi Azghadi, Nicolangelo Iannella, Said F Al-Sarawi, Giacomo Indiveri, and Derek Abbott. Spike-based Synaptic Plasticity in Silicon: Design, Implementation, Application, and Challenges.Proceedings of the IEEE, 102(5): 717--737, 2014.
12. Luiz Alberto Pasini Melek, Anselmo Luís da Silva, Márcio Cherem Schneider, and Carlos Galup-Montoro. Analysis and Design of the Classical CMOS Schmitt Trigger in Subthreshold Operation. IEEE Transactions on Circuits and Systems I: Regular Papers, 64(4):869--878, 2016.
13. IM Filanovsky and H Baltes. CMOS Schmitt Trigger Design. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 41(1):46--49, 1994.
14. Adria Bofill-i Petit and Alan F Murray. Synchrony Detection by Analogue VLSI Neurons with Bimodal STDP Synapses. In Proceedings of the 16th International Conference on Neural Information Processing Systems, pages 1027--1034. Citeseer, 2003.
15. Mostafa Rahimi Azghadi, Said Al-Sarawi, Nicolangelo Iannella, and Derek Abbott. Efficient Design of Triplet based Spike-Timing Dependent Plasticity. In The 2012 International Joint Conference on Neural Networks (IJCNN), pages 1--7. IEEE, 2012.
16. Giacomo Indiveri, Elisabetta Chicca, and Rodney Douglas. A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity. IEEE transactions on neural networks, 17(1):211--221, 2006.
17. Jayawan HB Wijekoon and Piotr Dudek. Integrated circuit implementation of a cortical neuron. In2008 IEEE International Symposium on Circuits and Systems, pages 1784--1787. IEEE, 2008.

Index Terms

• Hardware

  • Very large scale integration design

    • Analog and mixed-signal circuits

      • Analog and mixed-signal circuit optimization

    • Design reuse and communication-based design

      • Network on chip