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Code-size-aware Scheduling of Synchronous Dataflow Graphs on Multicore Systems

Published:27 March 2021Publication History
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Abstract

Synchronous dataflow graphs are widely used to model digital signal processing and multimedia applications. Self-timed execution is an efficient methodology for the analysis and scheduling of synchronous dataflow graphs. In this article, we propose a communication-aware self-timed execution approach to solve the problem of scheduling synchronous dataflow graphs on multicore systems with communication delays. Based on this communication-aware self-timed execution approach, four communication-aware scheduling algorithms are proposed using different allocation rules. Furthermore, a code-size-aware mapping heuristic is proposed and jointly used with a proposed scheduling algorithm to reduce the code size of SDFGs on multicore systems. The proposed scheduling algorithms are experimentally evaluated and found to perform better than existing algorithms in terms of throughput and runtime for several applications. The experiments also show that the proposed code-size-aware mapping approach can achieve significant code size reduction with limited throughput degradation in most cases.

References

  1. Emmanuel Agullo, Olivier Beaumont, Lionel Eyraud-Dubois, and Suraj Kumar. 2016. Are static schedules so bad? A case study on Cholesky factorization. In Proceedings of the IEEE International Parallel and Distributed Processing Symposium (IPDPS’16).Google ScholarGoogle ScholarCross RefCross Ref
  2. Árpád Beszédes, Rudolf Ferenc, Tibor Gyimóthy, André Dolenc, and Konsta Karsisto. 2003. Survey of code-size reduction methods. Comput. Surv. 35, 3 (2003), 223--267.Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. Shuvra S. Bhattacharyya, Praveen K. Murthy, and Edward A. Lee. 1999. Synthesis of embedded software from synchronous dataflow specifications. J. VLSI Sig. Proc. Syst. Sig. Image Vid. Technol. 21, 2 (1999), 151--166.Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. Bruno Bodin, Alix Munier-Kordon, and Benoît Dupont de Dinechin. 2012. K-periodic schedules for evaluating the maximum throughput of a synchronous dataflow graph. In Proceedings of the International Conference on Embedded Computer Systems (SAMOS’12).Google ScholarGoogle ScholarCross RefCross Ref
  5. Alessio Bonfietti, Michele Lombardi, Michela Milano, and Luca Benini. 2013. Maximum-throughput mapping of SDFGs on multi-core SoC platforms. J. Parallel Distrib. Comput. 73, 10 (2013), 1337--1350.Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. Louis-Claude Canon, Emmanuel Jeannot, Rizos Sakellariou, and Wei Zheng. 2008. Comparative evaluation of the robustness of DAG scheduling heuristics. In Grid Computing: Achievements and Prospects. Springer.Google ScholarGoogle Scholar
  7. Sardar M. Farhad, Yousun Ko, Bernd Burgstaller, and Bernhard Scholz. 2011. Orchestration by approximation: Mapping stream programs onto multicore architectures. ACM SIGPLAN Not. 46, 3 (2011), 357--368.Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. Amir Hossein Ghamarian, M. C. W. Geilen, Sander Stuijk, Twan Basten, Bart D. Theelen, Mohammad Reza Mousavi, A. J. M. Moonen, and M. J. G. Bekooij. 2006. Throughput analysis of synchronous data flow graphs. In Proceedings of the International Conference on Application of Concurrency to System Design (ACSD’06).Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. Michael I. Gordon, William Thies, and Saman Amarasinghe. 2006. Exploiting coarse-grained task, data, and pipeline parallelism in stream programs. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’06).Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. Zonghua Gu, Mingxuan Yuan, Nan Guan, Mingsong Lv, Xiuqiang He, Qingxu Deng, and Ge Yu. 2007. Static scheduling and software synthesis for dataflow graphs with symbolic model-checking. In Proceedings of the IEEE Real-time Systems Symposium (RTSS’07).Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. Ming-Yung Ko, Claudiu Zissulescu, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya, Bart Kienhuis, and Ed F. Deprettere. 2007. Parameterized looped schedules for compact representation of execution sequences in DSP hardware and software implementation. IEEE Trans. Sig. Proc. 55, 6 (2007), 3126--3138.Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. Chung-Yee Lee, Jing-Jang Hwang, Yuan-Chieh Chow, and Frank D. Anger. 1988. Multiprocessor scheduling with interprocessor communication delays. Op. Res. Lett. 7, 3 (1988), 141--147.Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. Edward Ashford Lee and David G. Messerschmitt. 1987. Static scheduling of synchronous data flow programs for digital signal processing. IEEE Trans. Comput. 100, 1 (1987), 24--35.Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. Charles E. Leiserson and James B. Saxe. 1991. Retiming synchronous circuitry. Algorithmica 6, 1 (1991), 5--35.Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. Stan Liao, Srinivas Devadas, Kurt Keutzer, Steve Tjiang, and Albert Wang. 1995. Storage assignment to decrease code size. ACM SIGPLAN Not. 30 (1995), 186--195.Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. Jing Lin, Andreas Gerstlauer, and Brian L. Evans. 2012. Communication-aware heterogeneous multiprocessor mapping for real-time streaming systems. J. Sig. Proc. Syst. 69, 3 (2012), 279--291.Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. Weichen Liu, Zonghua Gu, and Jiang Xu. 2009. Efficient software synthesis for dynamic single appearance scheduling of synchronous dataflow. IEEE Embed. Syst. Lett. 1, 3 (2009), 69--72.Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. Mingze Ma and Rizos Sakellariou. 2016. Buffer minimization for rate-optimal scheduling of synchronous dataflow graphs on multicore systems. In Proceedings of the International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP’16).Google ScholarGoogle ScholarCross RefCross Ref
  19. Mingze Ma and Rizos Sakellariou. 2017. Work-in-progress: Code-size-aware mapping for synchronous dataflow graphs on multicore systems. In Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion (CASES’17).Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. Mingze Ma and Rizos Sakellariou. 2018. Communication-aware scheduling algorithms for synchronous dataflow graphs on multicore systems. In Proceedings of the International Conference on Embedded Computer Systems (SAMOS’18).Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. Mingze Ma and Rizos Sakellariou. 2018. Reducing code size in scheduling synchronous dataflow graphs on multicore systems. In Proceedings of the Workshops on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM’18).Google ScholarGoogle Scholar
  22. Avinash Malik and David Gregg. 2013. Orchestrating stream graphs using model checking. ACM Trans. Archit. Code Optim. 10, 3 (2013), 19.Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. Praveen K. Murthy, Shuvra S. Bhattacharyya, and Edward A. Lee. 1997. Joint minimization of code and data for synchronous dataflow programs. Formal Meth. Syst. Des. 11, 1 (1997), 41--70.Google ScholarGoogle ScholarDigital LibraryDigital Library
  24. Hyunok Oh, Nikil Dutt, and Soonhoi Ha. 2006. Memory optimal single appearance schedule with dynamic loop count for synchronous dataflow graphs. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC’06).Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. SDF. 2018. Retrieved from http://www.es.ele.tue.nl/sdf3.Google ScholarGoogle Scholar
  26. Gilbert C. Sih and Edward A. Lee. 1993. A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures. IEEE Trans. Parallel Distrib. Syst. 4, 2 (1993), 175--187.Google ScholarGoogle ScholarDigital LibraryDigital Library
  27. StreamIt. 2018. Retrieved from http://groups.csail.mit.edu/cag/streamit.Google ScholarGoogle Scholar
  28. Sander Stuijk, Twan Basten, M. C. W. Geilen, and Henk Corporaal. 2007. Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs. In Proceedings of the Design Automation Conference (DAC’07).Google ScholarGoogle Scholar
  29. Sander Stuijk, Marc Geilen, and Twan Basten. 2006. Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs. In Proceedings of the Design Automation Conference (DAC’06).Google ScholarGoogle ScholarDigital LibraryDigital Library
  30. S. Stuijk, M. C. W. Geilen, and T. Basten. 2006. SDF: SDF for free. In Proceedings of the International Conference on Application of Concurrency to System Design (ACSD’06).Google ScholarGoogle Scholar
  31. Wonyong Sung and Soonhoi Ha. 2000. Memory efficient software synthesis with mixed coding style from dataflow graphs. IEEE Trans. Very Large Scale Integ. Syst. 8, 5 (2000), 522--526.Google ScholarGoogle ScholarDigital LibraryDigital Library
  32. Qi Tang, Twan Basten, Marc Geilen, Sander Stuijk, and Ji-Bo Wei. 2017. Mapping of synchronous dataflow graphs on MPSoCs based on parallelism enhancement. J. Parallel Distrib. Comput. 101 (2017), 79--91.Google ScholarGoogle ScholarDigital LibraryDigital Library
  33. William Thies, Michal Karczmarek, and Saman Amarasinghe. 2002. StreamIt: A language for streaming applications. In Proceedings of the International Conference on Compiler Construction.Google ScholarGoogle ScholarCross RefCross Ref
  34. Haluk Topcuoglu, Salim Hariri, and Min-you Wu. 2002. Performance-effective and low-complexity task scheduling for heterogeneous computing. IEEE Trans. Parallel Distrib. Syst. 13, 3 (2002), 260--274.Google ScholarGoogle ScholarDigital LibraryDigital Library
  35. Yi Wang, Duo Liu, Meng Wang, Zhiwei Qin, and Zili Shao. 2010. Optimal task scheduling by removing inter-core communication overhead for streaming applications on MPSoC. In Proceedings of the IEEE Real-time and Embedded Technology and Applications Symposium (RTAS’10).Google ScholarGoogle ScholarDigital LibraryDigital Library
  36. Xue-Yang Zhu, Marc Geilen, Twan Basten, and Sander Stuijk. 2012. Static rate-optimal scheduling of multirate DSP algorithms via retiming and unfolding. In Proceedings of the IEEE Real-time and Embedded Technology and Applications Symposium (RTAS’12).Google ScholarGoogle ScholarDigital LibraryDigital Library
  37. Xue-Yang Zhu, Marc Geilen, Twan Basten, and Sander Stuijk. 2014. Memory-constrained static rate-optimal scheduling of synchronous dataflow graphs via retiming. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’14).Google ScholarGoogle Scholar
  38. Xue-Yang Zhu, Marc Geilen, Twan Basten, and Sander Stuijk. 2016. Multiconstraint static scheduling of synchronous dataflow graphs via retiming and unfolding. IEEE Trans. Comput.-aided Des. Integ. Circ. Syst. 35, 6 (2016), 905--918.Google ScholarGoogle ScholarDigital LibraryDigital Library
  39. Ahmad Zmily and Christos Kozyrakis. 2006. Simultaneously improving code size, performance, and energy in embedded processors. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’06).Google ScholarGoogle ScholarCross RefCross Ref

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