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A Deep Learning Framework to Predict Routability for FPGA Circuit Placement

Published:12 August 2021Publication History
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Abstract

The ability to accurately and efficiently estimate the routability of a circuit based on its placement is one of the most challenging and difficult tasks in the Field Programmable Gate Array (FPGA) flow. In this article, we present a novel, deep learning framework based on a Convolutional Neural Network (CNN) model for predicting the routability of a placement. Since the performance of the CNN model is strongly dependent on the hyper-parameters selected for the model, we perform an exhaustive parameter tuning that significantly improves the model’s performance and we also avoid overfitting the model. We also incorporate the deep learning model into a state-of-the-art placement tool and show how the model can be used to (1) avoid costly, but futile, place-and-route iterations, and (2) improve the placer’s ability to produce routable placements for hard-to-route circuits using feedback based on routability estimates generated by the proposed model. The model is trained and evaluated using over 26K placement images derived from 372 benchmarks supplied by Xilinx Inc. We also explore several opportunities to further improve the reliability of the predictions made by the proposed DLRoute technique by splitting the model into two separate deep learning models for (a) global and (b) detailed placement during the optimization process. Experimental results show that the proposed framework achieves a routability prediction accuracy of 97% while exhibiting runtimes of only a few milliseconds.

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            • Published in

              cover image ACM Transactions on Reconfigurable Technology and Systems
              ACM Transactions on Reconfigurable Technology and Systems  Volume 14, Issue 3
              September 2021
              137 pages
              ISSN:1936-7406
              EISSN:1936-7414
              DOI:10.1145/3472296
              • Editor:
              • Deming Chen
              Issue’s Table of Contents

              Copyright © 2021 Association for Computing Machinery.

              Publisher

              Association for Computing Machinery

              New York, NY, United States

              Publication History

              • Published: 12 August 2021
              • Accepted: 1 May 2021
              • Revised: 1 January 2021
              • Received: 1 July 2020
              Published in trets Volume 14, Issue 3

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