Dimitrios Bountas
ABSTRACT
A statistical approach for the estimation of maximum and minimum leakage power in CMOS Very Large Scale Integration (VLSI) circuits is proposed in this paper. The approach is based on the discipline of statistics known as extreme value theory, and incorporates some important recent developments that have appeared in the literature. Experiments upon standard benchmark circuits show that estimates with a relative error of 5% on average (at a 99.99% confidence level) can be easily attained using no more than 3000 input vectors in all occasions.
- M. Abramowitz and I. Stegun. 1964. Handbook of Mathematical Functions. Dover.Google Scholar
- E. Castillo. 1988. Extreme Value Theory in Engineering. Academic Press.Google Scholar
- Z. Chen, M. Johnson, L. Wei, and K. Roy. 1998. Estimation of standby leakage power in CMOS circuit considering accurate modeling of transistor stacks. In ACM/IEEE International Symposium on Low Power Electronics and Design. 239–244.Google Scholar
- C. Ding, Q. Wu, C. Hsieh, and M. Pedram. 1997. Statistical Estimation of the Cumulative Distribution Function for Power Dissipation in VLSI Cirucits. In ACM/IEEE Desing Automation Conference. 371–376.Google Scholar
- N. Evmorfopoulos, G. Stamoulis, and J. Avaritsiotis. 2002. A Monte Carlo approach for maximum power estimation based on extreme value theory. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 21, 4(2002), 415–432.Google ScholarDigital Library
- A. Ferre and J. Figueras. 2002. Leakage power bounds in CMOS digital technologies. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 21, 6(2002), 731–738.Google ScholarDigital Library
- T.A. Fjeldly and M. Shur. 1993. Threshold voltage modeling and the subthreshold regime of operation of short-channel MOSFETs. IEEE Trans. on Electron Devices 40, 1 (1993), 137–145.Google ScholarCross Ref
- R. Fletcher. 1987. Practical Methods of Optimization(2 ed.). John Wiley & Sons, Inc.Google ScholarCross Ref
- J. Galambos. 1987. The Asymptotic Theory of Extreme Order Statistics (2 ed.). Krieger.Google Scholar
- R. Gu and M. Elmasry. 1996. Power dissipation analysis and optimization of deep submicron CMOS digital circuits. IEEE Journal of Solid-State Circuits 31, 5 (1996), 707–713.Google ScholarCross Ref
- A.M. Hill, C. C. Teng, and S. Kang. 1996. Simulation-based maximum power estimation. In IEEE International Symposium on Circuits and Systems, Vol. 4. 13–16.Google Scholar
- I. Ibragimov and Y. Linnik. 1971. Independent and Stationary Sequences of Random Variables. Wolters-Noordhoff Publishing, Groningen, The Netherlands.Google Scholar
- M. Johnson, D. Somasekhar, and K. Roy. 1999. Models and algorithms for bounds on leakage in CMOS circuits. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 18, 6(1999), 714–725.Google ScholarDigital Library
- S. Kang and Y. Leblebici. 2002. CMOS Digital Integrated Circuits Analysis & Design (3 ed.). McGraw-Hill, Inc., USA.Google Scholar
- A. Keshavarzi, K. Roy, and C.F. Hawkins. 1997. Intrinsic leakage in low power deep submicron CMOS ICs. In IEEE International Test Conference. 146–155.Google Scholar
- W. Maly and M. Patyra. 1992. Design of ICs Applying Built-in Current Testing. J. Electron. Test. 3, 4 (1992), 397–406.Google ScholarDigital Library
- P. Maxwell and J. Rearick. 1998. Estimation of Defect-Free IDDQ in Submicron Circuits Using Switch Level Simulation. In IEEE International Test Conference. 882–889.Google Scholar
- C. Rao. 1973. Linear Statistical Inference and its Applications (2 ed.). John Wiley & Sons, Inc.Google Scholar
- S. Resnick. 1971. Tail Equivalence and Its Applications. J. of Applied Probability 8, 1 (1971), 136–156.Google ScholarCross Ref
- S. Resnick. 1987. Extreme Values, Regular Variation and Point Processes (1 ed.). Springer, New York, NY.Google Scholar
- C. Wang and K. Roy. 1998. Maximum power estimation for CMOS circuits using deterministic and statistical approaches. IEEE Trans. on Very Large Scale Integration (VLSI) Systems 6, 1(1998), 134–140.Google ScholarDigital Library
- Q. Wu, Q. Qiu, and M. Pedram. 2001. Estimation of peak power dissipation in VLSI circuits using the limiting distributions of extreme order statistics. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 20, 8(2001), 942–956.Google ScholarDigital Library
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(auto-classified)Statistical Estimation of Leakage Power Bounds in CMOS VLSI Circuits
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