Abstract
This paper presents the implementation of Queuing Ports, a blocking communication protocol developed for manycore architectures that perform a synchronized communication between cores without the need of polling. This implementation has been performed on M2OS-mc, a Real- Time Operating System (RTOS) that has already been tested in the Epiphany processor. The extension presented is based on the ARINC-653's Queuing Port communication primitive and gives an alternative to the implementation based in the ARINC-653's Sampling Port communication primitive previously developed.1
- A. Olofsson, T. Nordström, and Z. Ul-Abdin, "Kickstarting high-performance energy-efficient manycore architectures with epiphany," 2014.Google Scholar
Cross Ref
- D. García Villaescusa, M. Aldea Rivas, and M. González Harbour, "M2OS-Mc: An RTOS for Many-Core Processors," in Second Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2021) (M. Bertogna and F. Terraneo, eds.), vol. 87 of OpenAccess Series in Informatics (OASIcs), (Dagstuhl, Germany), pp. 5:1--5:13, Schloss Dagstuhl--Leibniz-Zentrum für Informatik, 2021.Google Scholar
- J. G. Balaguer, J. R. Z. Flores, and J. A. de la Puente Alfaro, "Arinc-653 inter-partition communications and the ravenscar profile," Ada Letters, vol. 35, no. 1, pp. 38--45, 2015.Google Scholar
Digital Library
- M. González Harbour, J. L. Medina, J. J. Gutiérrez, J. Palencia, and J. Drake, "Mast: An open environment for modeling, analysis, and design of real-time systems," 1st CARTS Workshop, January 2002.Google Scholar
- E. Enterprise, "Erika3." [Online; accessed 29-January- 2020].Google Scholar
- eSol, "Scalable and High-performance Real-Time OS available for various types of processors." [Online; accessed 29-January-2020].Google Scholar
- H. Almatary, Operating System Kernels on Multi-core Architectures. PhD thesis, University of York, January 2016.Google Scholar
- A. Olofsson, T. Nordström, and Z. Ul-Abdin, "Kickstarting high-performance energy-efficient manycore architectures with epiphany," 2014.Google Scholar
Cross Ref
- M. Aldea Rivas and H. Pérez Tijero, "Leveraging realtime and multitasking Ada capabilities to small microcontrollers," Journal of Systems Architecture, vol. 94, pp. 32 -- 41, 2019.Google Scholar
Cross Ref
- M. Aldea Rivas and H. Pérez Tijero, "Proposal for a new Ada profile for small microcontrollers," Ada Lett., vol. 38, p. 34--39, July 2018.Google Scholar
Digital Library
Recommendations
From GPGPU to Many-Core: Nvidia Fermi and Intel Many Integrated Core Architecture
Comparing the architectures and performance levels of an Nvidia Fermi accelerator with an Intel MIC Architecture coprocessor demonstrates the benefit of the coprocessor for bringing highly parallel applications into, or even beyond, GPGPU performance ...
On the Use of a Many-core Processor for Computational Fluid Dynamics Simulations
The increased availability of modern embedded many-core architectures supporting floating- point operations in hardware makes them interesting targets in traditional high performance computing areas as well. In this paper, the Lattice Boltzmann Method (...
High performance in silico virtual drug screening on many-core processors
Drug screening is an important part of the drug development pipeline for the pharmaceutical industry. Traditional, lab-based methods are increasingly being augmented with computational methods, ranging from simple molecular similarity searches through ...






Comments