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High-Level Approaches to Hardware Security: A Tutorial

Published:20 April 2023Publication History
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Abstract

Designers use third-party intellectual property (IP) cores and outsource various steps in the integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities have been rising. This is forcing IC designers and end users to re-evaluate their trust in ICs. If attackers get hold of an unprotected IC, they can reverse engineer the IC and pirate the IP. Similarly, if attackers get hold of a design, they can insert malicious circuits or take advantage of “backdoors” in a design. Unintended design bugs can also result in security weaknesses. This tutorial paper provides an introduction to the domain of hardware security through two pedagogical examples of hardware security problems. The first is a walk-through of the scan chain-based side channel attack. The second is a walk-through of logic locking of digital designs. The tutorial material is accompanied by open access digital resources that are linked in this article.

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      cover image ACM Transactions on Embedded Computing Systems
      ACM Transactions on Embedded Computing Systems  Volume 22, Issue 3
      May 2023
      546 pages
      ISSN:1539-9087
      EISSN:1558-3465
      DOI:10.1145/3592782
      • Editor:
      • Tulika Mitra
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      Publication History

      • Published: 20 April 2023
      • Online AM: 17 January 2023
      • Accepted: 30 November 2022
      • Revised: 20 November 2022
      • Received: 25 July 2022
      Published in tecs Volume 22, Issue 3

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