Abstract
It has been found that pipelining at the firmware level of machine organization can provide significant execution time benefits for certain types of instructions. The essential concept involved with this approach is the pipelining of operations within the hardware under direct control of the firmware, rather than the pipelining of microinstructions. Specifically, multiple data values exist within the machine's datapaths which have undergone different amounts of processing.
This paper describes the application of these techniques to a specific pipelined computer. A brief description of the system level pipeline is provided with two examples of the firmware pipeline approach. The operations of floating point normalization and memory transfers have been described in detail.
- 1 A. K. Agrawala and T. G. Rauscher, Foundations of Microprogramming - Architecture, Software, and Applications, Academic Press, New York, New York, 1976.]]Google Scholar
- 2 M. Andrews, Principles of Firmware Engineering in Microprogram Control, Computer Science Press, Potomac, Maryland, 1980.]] Google Scholar
Digital Library
- 3 J. A. Fisher, "2N-Way Jump Microinstruction Hardware and an Effective Instruction Binding Method," Proc 13th Annual Microprogramming Workshop, November 1980.]] Google Scholar
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- 4 T. R. Gross and J. L. Hennessy, "Optimizing Delayed Branches," Proc 15th Annual Microprogramming Workshop, October 1982.]] Google Scholar
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- 5 P.M. Kogge, The Architecture of Pipelined Computers, McGraw-Hill, New York, 1981.]] Google Scholar
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- 6 A. Mathialagan and N. N. Biswas, "Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers," IEEE Trans on Computers, C-30, pp 144-147, February 1981.]]Google Scholar
Index Terms
Applications of pipelining to firmware
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Applications of pipelining to firmware
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