skip to main content
article
Free Access

A “metasimulator” for microcoded processors

Published:01 December 1984Publication History
Skip Abstract Section

Abstract

In a computer design project where software and hardware development proceed in parallel, it is essential that some form of simulation is available early so that the software can be breadboarded before the hardware is stable. The simulator must be readily modifiable to accommodate evolving hardware design. For a project at AT&T Bell Laboratories involving several processors of different designs, a program was constructed that generates a simulator from a description of the hardware block diagram. This paper describes the design of that program.

References

  1. 1 C. G. Bell and A. Newell, Computer Structures: Readings and Examples. New York, New York: McGraw-Hill, 1971. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2 M. R. Barbacci, "Instruction Set Processor Specifications (ISPS): The notation and its applications," IEEE Trans. Comp., Vol. C-30, No. 1, pp. 29-40, January 1981.Google ScholarGoogle Scholar
  3. 3 M. R. Barbacci, The Design and Analysis of Instruction Set Processors. New York, New York: McGraw-Hill, 1982. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4 C. W. Rose, G. M. Ordy, and P. J. Drongowski, "N.mPc: A Study in University-Industry Technology Transfer," IEEE Design and Test of Computers, Vol. 1, No. 1, pp. 44-56, February 1984.Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. 5 T. Uehara and M. Barbacci (ed.), Computer Hardware Description Languages and their Applications. Amsterdam: North-Holland, 1983. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6 M. Persson, "Design of Software Tools for Microprogrammable Microprocessor," Microprocessors and their Applications: Fifth EUROMICRO Symposium on Microprocessing and Microprogramming, pp. 119-127, August 1979.Google ScholarGoogle Scholar
  7. 7 J. L. Kelly, Jr., C. Lochbaum, and V. A. Vyssotsky, "A Block Diagram Compiler," Bell Syst. Tech. J., Vol. 40, No. 3, pp. 669-676, May 1961.Google ScholarGoogle ScholarCross RefCross Ref
  8. 8 Alfred V. Aho, John E. Hopcroft, and Jeffrey D. Ullman, Data Structures and Algorithms. Reading, Massachusetts: Addison-Wesley, 1983. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. 9 VAK-11 Symbolic Debugger Reference Manual. Maynard, Massachusetts: Digital Equipment Corporation, 1981.Google ScholarGoogle Scholar
  10. 10 Bipolar Microprocessor Logic and Interface Data Book. Sunnyvale, California: Advanced Micro Devices, 1981.Google ScholarGoogle Scholar
  11. 11 R. L. Whitelaw, private communication.Google ScholarGoogle Scholar

Index Terms

  1. A “metasimulator” for microcoded processors

      Recommendations

      Comments

      Login options

      Check if you have access through your login credentials or your institution to get full access on this article.

      Sign in

      Full Access

      • Published in

        cover image ACM SIGMICRO Newsletter
        ACM SIGMICRO Newsletter  Volume 15, Issue 4
        MICRO 17: Proceedings of the Seventeenth Annual Microprogramming Workshop
        Dec. 1984
        302 pages
        ISSN:1050-916X
        DOI:10.1145/384281
        Issue’s Table of Contents
        • cover image ACM Conferences
          MICRO 17: Proceedings of the 17th annual workshop on Microprogramming
          December 1984
          325 pages

        Copyright © 1984 Author

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 1 December 1984

        Check for updates

        Qualifiers

        • article

      PDF Format

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader
      About Cookies On This Site

      We use cookies to ensure that we give you the best experience on our website.

      Learn more

      Got it!