The ultimate RISC

Abstract

Reduced instruction set computer (RISC) architectures have attracted considerable interest during the past decade. The ultimate RISC architecture presented here is an extreme yet simple illustration of such an architecture. It has only one instruction, move memory to memory, yet it is useful.

References

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Index Terms

• Computer systems organization

  • Architectures

    • Parallel architectures

      • Very long instruction word

    • Serial architectures

      • Complex instruction set computing

      • Pipeline computing

      • Reduced instruction set computing