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A flexible VLSI core for an adaptable architecture

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Published:01 August 1989Publication History
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Abstract

Two major limitations concerning the design of cost-effective application-specific architectures are the recurrent costs of system-software development and hardware implementation, in particular VLSI implementation, for each architecture.

The SCalable ARChitecture Experiment (SCARCE) aims to provide a framework for application-specific processor design. The framework allows scaling of functionality, implementation complexity, and performance. The SCARCE framework consists and will consist of: an architecture framework defining the constraints for the design of application-specific architectures; tools for synthesizing architectures from application or application-area; VLSI cell libraries and tools for quick generation of application-specific processors; a system-software platform which can be retargeted quickly to fit the application-specific architecture;

This paper concentrates on the micro-architecture framework of SCARCE and outlines the process of generating VLSI processors.

References

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      • Published in

        cover image ACM SIGMICRO Newsletter
        ACM SIGMICRO Newsletter  Volume 20, Issue 3
        Sep. 1989
        253 pages
        ISSN:1050-916X
        DOI:10.1145/75395
        Issue’s Table of Contents
        • cover image ACM Conferences
          MICRO 22: Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
          August 1989
          253 pages
          ISBN:0897913248
          DOI:10.1145/75362

        Copyright © 1989 Authors

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 1 August 1989

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