ABSTRACT
This paper investigates a design weakness in the PDP-11 architecture, namely the condition code bits. Experience with the machine has demonstrated a number of “traps” for the unwary programmer stemming directly from an inconsistent and sometimes confusing scheme of condition code settings. This is particularly annoying in view of the otherwise clean architectural characteristics of the machine. A number of “principles” are proposed that would correct the deficiencies and could therefore be used as a guide for designing future machines. The paper also presents some measurements based on actual programmatic usage of the PDP-11 that question the validity of a condition code scheme as an efficient architectural technique.
References
- 1.Bell, Gordon, and Strecker, William D. "Computer Structures: What Have We Learned from the PDP-11?", Proceedings of the Third Annual Symposium on Computer Architecture, Jan. 1976, also published in Computer Architecture News Vol. 4 No. 4 (Jan. 1976) pp. 1-14. Google Scholar
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- 2.Digital Equipment Corporation PDP-11/70 Processor Handbook (1975).Google Scholar
- 3.Lunde, Amund "Empirical Evaluation of Some Features of Instruction Set Processor Architectures", Communications of the ACM Vol. 20 No. 3 (Mar. 1977) pp. 143-153. Google Scholar
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- 4.Russell, Robert D. "Experience in the Design, Implementation, and Use of PL-11, a Programming Language for the PDP-11", Proceedings of the ACM SIGMINI/SIGPLAN Interface Meeting on Programming Systems in the Small Processor Environment, New Orleans, Mar. 1976, published in ACM SIGPLAN Notices Vol. 11 No. 4 (Apr. 1976) pp. 27-44. Google Scholar
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- 5.Steele, Guy L., Jr. "Arithmetic Shifting Considered Harmful", ACM SIGPLAN Notices Vol. 12, No 11 (Nov. 1977) pp. 61-69. Google Scholar
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- 6.Tanenbaum, Andrew S. "Ambiguous Machine Architectures and Program Efficiency", Computer Architecture News Vol. 6 No. 3 (Aug. 1977) pp. 11-13. Google Scholar
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Index Terms
The PDP-11: A case study of how not to design condition codes




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