Large-scale fixed-outline floorplanning design using convex optimization techniques

ABSTRACT

A two-stage optimization methodology is proposed to solve the fixed-outline floorplanning problem that is a global optimization problem for wirelength minimization. In the first stage, an attractor-repeller convex optimization model provides the relative positions of the modules on the floorplan. The second stage places and sizes the modules using second-order cone optimization. A Voronoi diagram is employed to obtain a planar graph and thus a relative position matrix to connect the two stages. Overlap-free and deadspace-free floorplans are achieved in a fixed outline and floorplans with any specified percentage of whitespace can be produced. Experimental results on GSRC benchmarks demonstrate that we obtain significant improvements on the best results known in the literature for these benchmarks. Most importantly, our methodology provides greater improvement over other floor-planners as the number of modules increases.

References

1. S. N. Adya, S. Chaturvedi, J. A. Roy, D. A. Papa and I. L. Markov, "Unification of partitioning, placement and floorplanning," Proc. of IEEE/ACM Intl. Conf. on Computer-Aided Design, pp. 550--557, 2004.
2. S. N. Adya and I. L. Markov, "Fixed-outline floorplanning: enabling hierarchical design," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, Vol.11, No.6, pp. 1120--1135, 2003.
3. M. F. Anjos and A. Vannelli, "A new mathematical-programming framework for facility-layout design," INFORMS Journal on Computing, Vol.18, No.1, pp. 111--118, 2006.
4. T.-C. Chen, Y.-W. Chang and S.-C. Lin, "IMF: interconnect-driven multilevel floorplanning for large-scale building-module designs," Proc. of IEEE/ACM Intl. Conf. on Computer-Aided Design, pp. 159--164, 2005.
5. T.-C. Chen and Y.-W. Chang, "Modern floorplanning based on B*-tree and fast simulated annealing," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol.25, No.4, pp. 637--650, 2006.
6. M. Ferris, M. Mesnier and J. Moré, "NEOS and Condor: Solving optimization problems over the Internet," ACM Trans. on Math. Softw., Vol.26, No.1, pp. 1--18, 2000.
7. R. Fourer, D. M. Gay and B. W. Kernighan, AMPL: A modeling language for mathematical programming. Pacific Grove, CA: Thomson/Brooks/Cole, 2003.
8. L. Jin, D. Kim, L. Mu, D.-S. Kim and S.-M. Hu, "A sweepline algorithm for Euclidean Voronoi diagram of circles," Computer-Aided Design, Vol.38, pp. 260--272, 2006.
9. A. B. Kahng, "Classical floorplanning harmful?", Proc. of ACM Intl. Symp. on Physical Design, pp. 207--213, 2000.
10. M. S. Lobo, L. Vandenberghe, S. Boyd and H. Lebret, "Applications of second order cone programming," Linear Algebra and its Applications, Vol.284, pp. 193--228, 1998.
11. T.-S. Moh, T.-S. Chang and S. L. Hakimi, "Globally optimal floorplanning for a layout problem," IEEE Trans. on Circuits and Systems, Vol.43, No.9, pp. 713--720, 1996.
12. MOSEK, "http://www.mosek.com/documentation.html."
13. B. A. Murtagh and M. A. Saunders, "MINOS 5.4 User's Guide," Report SOL 83-20R, Systems Optimization Laboratory, Stanford University, Dec 1983 (revised Feb 1995).
14. PARQUET, "http://vlsicad.eecs.umich.edu/BK/parquet/"
15. Y. Zhan, Y. Feng and S. S. Sapatnekar, "A fixed-die floorplanning algorithm using an analytical approach," Proc. of Asia and South Pacific Design Automation Conf, pp. 771--776, 2006.

Index Terms

• Hardware

  • Hardware validation

  • Integrated circuits

    • Interconnect

• Mathematics of computing

  • Mathematical analysis

    • Mathematical optimization

• Theory of computation

  • Design and analysis of algorithms

    • Mathematical optimization