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Implementation of artificial neural networks on a reconfigurable hardware accelerator

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Published:09 January 2002Publication History

ABSTRACT

The hardware implementation of three different artificial neural networks is presented. The basis for the implementation is the reconfigurable hardware accelerator RAPTOR2000, which is based on FPGAs. The investigated neural network architectures are neural associative memories, self-organizing feature maps and basis function networks. Some of the key implementational issues are considered. Especially resource-efficiency and performance of the presented realizations are discussed.

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          • Published in

            cover image Guide Proceedings
            EUROMICRO-PDP'02: Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
            January 2002
            478 pages
            ISBN:0769514448

            Publisher

            IEEE Computer Society

            United States

            Publication History

            • Published: 9 January 2002

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            • Article