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MSPC '14: Proceedings of the workshop on Memory Systems Performance and Correctness
ACM2014 Proceeding
Publisher:
  • Association for Computing Machinery
  • New York
  • NY
  • United States
Conference:
PLDI '14: ACM SIGPLAN Conference on Programming Language Design and Implementation Edinburgh United Kingdom 13 June 2014
ISBN:
978-1-4503-2917-0
Published:
13 June 2014
Sponsors:

Bibliometrics
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Abstract

Memory continues to be a major bottleneck in almost all computing systems. It is becoming more so as more cores and other agents are sharing parts of the memory system, and as applications that run on the cores are becoming increasingly data intensive. Continuing the tradition of eight previous successful incarnations, MSPC 2014 provided a forum for discussing all aspects of memory performance and correctness on a variety of systems (multi-core, desktop, embedded, server/cloud, high-performance computing, sensor, etc) and related software and hardware innovations at various levels of the technology stack.

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research-article
A study of connected object locality in NUMA heaps

Reference locality is vital to the performance of parallel Garbage Collection (GC) running on Non-Uniform Memory Access (NUMA) machines. A GC thread may trace remotely placed objects that descend from the root set or, for load balance, a GC thread may ...

research-article
Affinity-based hash tables

From a trace of data accesses, it is possible to calculate an affinity hierarchy that groups related data together. Combining this hierarchy with the extremely common hash table, there is an opportunity to both improve cache performance and enable novel ...

research-article
Feedback directed optimization of TCMalloc

TCMalloc [9] is an open-source memory allocator. Its use of thread-local caches of free objects enables most allocations/deallocations to be satisfied from thread-local heaps not requiring locks, making it a highly scalable memory allocator for multi-...

research-article
Main memory and cache performance of intel sandy bridge and AMD bulldozer

Application performance on multicore processors is seldom constrained by the speed of floating point or integer units. Much more often, limitations are caused by the memory subsystem, particularly shared resources such as last level caches or memory ...

research-article
Nonvolatile memory is a broken time machine

Energy harvesting enables intermittently powered devices to compute without built-in power. But frequent power failures, combined with nonvolatile memory intended to protect computational state, introduce strange control flow that turns sequential code ...

research-article
O-structures: semantics for versioned memory

This paper introduces O-structures, a novel architectural memory element that can be used to facilitate parallelism in task-based execution models. Much like register renaming, each write to an O-structure creates a new version of program memory at that ...

research-article
Open Access
Outlawing ghosts: avoiding out-of-thin-air results

It is very difficult to define a programming language memory model for shared variables that both

• allows programmers to take full advantage of weakly-ordered memory operations, but still

• correctly disallows so-called "out-of-thin-air" results, i.e. ...

research-article
Trash in cache: detecting eternally silent stores

The gap between processing and storage speeds remains a concern for computer system designers and application developers. This disparity can be bridged in part by eliminating unnecessary stores, thereby reducing the amount of traffic that flows from the ...

Contributors
  • University of Glasgow
  • Purdue University
  • Microsoft Corporation

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Acceptance Rates

MSPC '14 Paper Acceptance Rate6of20submissions,30%Overall Acceptance Rate6of20submissions,30%
YearSubmittedAcceptedRate
MSPC '1420630%
Overall20630%