Welcome to Sankt Goar and the SCOPES workshop. This year we are presenting a workshop program that features many interesting talks on all aspects related to the design of modern embedded systems. I hope that you will find our program interesting, stimulating and exciting.
Proceeding Downloads
Computation in Memory for Data-Intensive Applications: Beyond CMOS and beyond Von- Neumann
One of the most critical challenges for today's and future data-intensive and big-data problems (ranging from economics and business activities to public administration, from national security to many scientific research areas) is data storage and ...
Adaptive Isolation for Predictable MPSoC Stream Processing
Resource sharing and interferences of multiple threads of one, but even worse between multiple application programs running concurrently on a Multi-Processor System-on-a-Chip (MPSoC) today make it very hard to provide any timing or throughput-critical ...
Programming Strategies for Contextual Runtime Specialization
Runtime adaptability is expected to adjust the application and the mapping of computations according to usage contexts, operating environments, resources availability, etc. However, extending applications with adaptive features can be a complex task, ...
Static analysis of energy consumption for LLVM IR programs
Energy models can be constructed by characterizing the energy consumed when executing each instruction in a processor's instruction set. This can be used to determine how much energy is required to execute a sequence of assembly instructions, without ...
Bytewise Register Allocation
Traditionally, variables have been considered as atoms by register allocation: Each variable was to be placed in one register, or spilt (placed in main memory) or rematerialized (recalculated as needed). Some flexibility arose from what would be ...
Utilization Improvement by Enforcing Mutual Exclusive Task Execution in Modal Stream Processing Applications
Real-time dataflow analysis techniques for multiprocessor systems ignore that the execution of tasks belonging to different operation modes are mutually exclusive. This results in more resources being reserved than strictly needed and a low resource ...
Efficient Compilation of Stream Programs for Heterogeneous Architectures: A Model-Checking based approach
Stream programming based on the synchronous data flow (SDF) model naturally exposes data, task and pipeline parallelism. Statically scheduling stream programs for homogeneous architectures has been an area of extensive research. With graphic processing ...
Plasmon-based Virus Detection on Heterogeneous Embedded Systems
Embedded systems, e.g. in computer vision applications, are expected to provide significant amounts of computing power to process large data volumes. Many of these systems, such as used in medical diagnosis, are mobile devices and face significant ...
Use of Previously Acquired Positioning of Optimizations for Phase Ordering Exploration
This paper presents a new approach to efficiently search for suitable compiler pass sequences, a challenge known as phase ordering. Our approach relies on information about the relative positions of compiler passes in compiler pass sequences previously ...
Throughput-optimizing Compilation of Dataflow Applications for Multi-Cores using Quasi-Static Scheduling
Application modeling using dynamic dataflow graphs is well-suited for multi-core platforms. However, there is often a mismatch between the fine granularity of the application and the platform. Tailoring this granularity to the platform promises ...
A Toolflow for Parallelization of Embedded Software in Multicore DSP Platforms
Multicore Digital Signal Processors (DSPs) have gained relevance in recent years due to the emergence of data-intensive applications, such as wireless communications and multimedia processing on mobile devices, which demand increased computational ...
Is dynamic compilation possible for embedded systems?
JIT compilation and dynamic compilation are powerful techniques allowing to delay the final code generation to the runtime. There is many benefits: improved portability, virtual machine security, etc.
Unforturnately the tools used for JIT compilation ...
Application-Specific Architecture Exploration Based on Processor-Agnostic Performance Estimation
Early design decisions such as architectural class and instruction set selection largely determine the performance and energy consumption of application specific processors (ASIPs). However, making decisions that effectively reflect in high performance ...
A Concept of Vector Clock Utilization in an Iterative Tracing Approach for Distributed Embedded Systems
Tracing is an inevitable concept for assessing system behavior and optimizing resource utilization in parallel embedded real-time architectures. In the last decades, tracing and trace-recording analysis gained increasing importance due to more complex, ...
High-level software-pipelining in LLVM
Software-pipelining is an important technique for increasing the instruction level parallelism of loops during compilation. Currently, the LLVM compiler infrastructure does not offer this optimization although some target specific implementations do ...
Schedulability Aware WCET-Optimization of Periodic Preemptive Hard Real-Time Multitasking Systems
In hard real-time multitasking systems, applying WCET-oriented code optimizations to individual tasks may not lead to optimal results with regard to the system's schedulability. We propose an approach based on Integer-Linear Programming which is able to ...
Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Many-Core Systems
Exploiting effectively massively parallel architectures is a major challenge that stream programming can help to face. We investigate the problem of generating energy-optimal code for a collection of streaming tasks that include parallelizable or ...
Modular translation validation of a full-sized synchronous compiler using off-the-shelf verification tools
This presentation demonstrates a scalable, modular, refinable methodology for translation validation applied to a mature (20 years old), large (500k lines of C), open source (Eclipse/Polarsys IWG project POP) code generation suite, all by using off-the-...
An Energy Efficient Message Passing Synchronization Algorithm for Concurrent Data Structures in Embedded Systems
Nowadays, modern multicore embedded systems often execute complex applications that rely heavily on concurrent data structures. Databases on embedded microservers, file systems and stream processing algorithms belong in application domains that normally ...
VLIW Code Generation for a Convolutional Network Accelerator
This paper presents a compiler flow to map Deep Convolutional Networks (ConvNets) to a highly specialized VLIW accelerator core targeting the low-power embedded market. Earlier works have focused on energy efficient accelerators for this class of ...
Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays
Massively Parallel Processor Arrays (MPPAs) can be nicely used in portable devices such as tablets and smartphones. However, applications running on mobile platforms require a certain performance level or quality (e.g., high-resolution image processing) ...
A framework for optimizing OpenVX applications performance on embedded manycore accelerators
Nowadays Computer Vision application are ubiquitous, and their presence on embedded devices is more and more widespread. Heterogeneous embedded systems featuring a clustered manycore accelerator are a very promising target to execute embedded vision ...
Modeling Exclusive Memory Access for a Time-Decoupled Parallel SystemC Simulator
The growing complexity of modern embedded systems poses a challenge to designers of virtual platforms, as the increasing number of processors causes simulation speed to degrade. To remain viable as design tools, virtual platforms must use highly ...
Synchronous Reactive Nano-Kernels: Exploring the Limits of Power and Energy Efficiency in Embedded Systems
MpicOS is a reactive nano-kernel designed for controlling power- and energy-bound multicore embedded systems. Contrary to the mainstream approach of providing a multithreading framework with context saving, MpicOS is articulated around the reactive ...
Index Terms
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems
Recommendations
Acceptance Rates
| Year | Submitted | Accepted | Rate |
|---|---|---|---|
| SCOPES '21 | 15 | 7 | 47% |
| SCOPES '20 | 13 | 8 | 62% |
| SCOPES '17 | 9 | 6 | 67% |
| M-SCOPES '13 | 16 | 9 | 56% |
| SCOPES '09 | 26 | 8 | 31% |
| Overall | 79 | 38 | 48% |




